Transform photonic Quantum device requirements into fabrication-ready chip designs using AI-assisted workflows.
This platform is currently a beta version and intended for research and evaluation purposes. Generated designs, simulations, and AI analysis are provided as engineering aids and should be validated before fabrication.
Describe your device in plain language or structured fields - wavelength, platform, objective.
The AI engine translates intent into a validated, structured photonic design specification.
gdsfactory synthesizes real chip geometry with an interactive SVG preview.
Download fabrication-ready GDSII, SVG, JSON, and an engineering report.
Directional 1×2 power splitter
Splits an input mode into two outputs at a configurable ratio. The workhorse of interferometric quantum photonic circuits.
Single-mode routing element
Low-loss channel that confines and routes light across the chip. The foundation every other component connects to.
Evanescent 2×2 coupler
Two waveguides brought close so light couples between them - the basis for tunable splitting and switching.
Fiber-to-chip interface
Diffractive grating that couples light between an optical fiber and an on-chip waveguide for I/O.
Tunable interferometric switch
Two splitters bridged by two arms - the programmable unit cell of quantum photonic processors.
Representative examples of DsynQ output
Silicon photonics - 1550 nm - balanced split
Silicon nitride - 1310 nm - max efficiency
Silicon photonics - 1550 nm - max coupling
Analytic-FDTD - power budget at 1550 nm
Three evaluated variants, ranked
| Cand. | Score | Eff. | Loss |
|---|---|---|---|
| ABEST | 0.92 | 96.4% | 0.18 dB |
| B | 0.88 | 95.1% | 0.14 dB |
| C | 0.85 | 93.7% | 0.22 dB |
Grounded, structured - quotes only figures from the design
“Candidate A meets the balanced-split objective at 96.4% efficiency with 0.18 dB insertion loss across a 42 nm band. The design is robust to typical fabrication tolerances (fab score 88/100).”
Go from requirement to layout in seconds, compressing days of manual CAD work.
An intelligence layer that recommends parameters and writes your engineering summaries.
Standards-compliant GDSII streams that drop straight into your tape-out flow.
Built around the interferometric building blocks of quantum photonic processors.
No sign-up required - generate a fabrication-ready layout in under a minute.
Start Designing